Digital Electronics

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# Digital Electronics

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Description

This unique application is for all students across the world. It covers 165 topics of Digital electronics in detail. These 165 topics are divided in 7 units.

Each topic is around 600 words and is complete with diagrams, equations and other forms of graphical representations along with simple text explaining the concept in detail.

This USP of this application is "ultra-portability". Students can access the content on-the-go from anywhere they like.

Basically, each topic is like a detailed flash card and will make the lives of students simpler and easier.

Some of topics Covered in this application are:

1. Decimal System
2. Binary System
3. Representing Binary Quantities
5. Binary-To-Decimal and Decimal-to-binary Conversion
6. Binary-To-Octal / Octal-To-Binary Conversion
9. Floating-Point Numbers
10. Binary Codes
11. Non Weighted Codes
12. Binary - Gray Code Conversion
13. Gray Code - Binary Conversion
14. Gray Code Applications
15. Alphanumeric Codes-ASCII code
16. EBCDIC code
17. Seven-segment Display Code
18. Error Detecting Codes
19. Error Correcting Codes.
20. Boolean Switching Algebras
21. Boolean Algebra Theorems
22. Minterms and Maxterms
23. Sum Of Products (SOP) and Product Of Sum (POS)
24. AND-Logic Gate
25. OR-Logic Gate
26. NOT-Logic Gate
27. NAND-Logic Gate
28. NOR-Logic Gate
29. XNOR-Logic Gate
30. Universal Gates
31. Realization of logic function using NAND gates
32. Realization of logic gates using NAND gates
33. Realization of logic function using NOR gates
34. Realization of logic gates using NOR gates.
35. Tristate Logic Gates
36. AND-OR-INVERT Gates
37. Schmitt Gates
38. Karnaugh Maps
39. Minimization Technique
40. 2-Variable K-Map
41. Grouping/Circling K-maps
42. Example of 2-Variable K-Map groups
43. 3-Variable K-Map
44. Example of 3-Variable K-Map
45. 4-Variable K-Map
46. Example of 4-Variable K-Map
47. 5-Variable K-Map
48. QUINE-Mccluskey minimization
49. QUINE-Mccluskey minimization Method-Example
50. Multiplexer
51. 2x1 Multiplexer
52. Design of a 2:1 Mux
53. 4:1 MUX
54. 8-to-1 multiplexer from Smaller MUX
55. 16-to-1 multiplexer from 4:1 mux
56. De-multiplexers
57. Mechanical Equivalent of a De-Multiplexer
58. 1-to-4 De-multiplexer
59. Boolean Function Implementation using Mux and de-Mux
60. 3-variable Function Using 4-to-1 mux
61. 2 to 4 Decoder using Demux
70. Subtracter
71. Full Subtracter
72. Parallel Binary Subtracter
73. Serial Binary Subtracter.
74. Comparators
75. Encoders
76. Decimal-to-Binary Encoder
77. Priority Encoder
78. Introduction to Sequential Circuit
79. Concept of Sequential Logic
80. Input enable signals
81. RS Latch
82. RS Latch with Clock
83. Setup and Hold Time
84. D Latch
85. JK Latch
86. T Latch
87. R-S Flip-Flop with Active LOW Inputs
88. R-S Flip-Flop with Active HIGH Inputs
89. R-S Flip-Flop Implementation with NOR gates
90. Clocked R-S Flip-Flop
91. Clocked R-S flip-flop with active LOW inputs
92. J-K Flip-Flop
93. Realization of a J-K flip-flop with an R-S flip-flop
94. J-K Flip-Flop with PRESET and CLEAR Inputs
95. Master - Slave Flip-Flops
96. Toggle Flip-Flop (T Flip-Flop)
97. J-K Flip-Flop as a Toggle Flip-Flop
98. D Flip-Flop
99. J-K Flip-Flop as D Flip-Flop

All topics are not listed because of character limitations set by the Play Store.

## Users review

from 2 reviews

"Good"

6